TSMC, Hsinchu
The overwhelming majority of contract production on leading-edge nodes is manufactured on an island of 36,000 km², 130 km off China's coast, in an active seismic zone. No equivalent redundancy exists anywhere else on Earth.
Taiwan still holds ~66% of global advanced-logic (<10nm) capacity in 2024, a share projected to fall toward 55% by 2027 as Arizona ramps, though the bleeding-edge nodes (3nm/2nm) stay in Taiwan.TrendForce, 2024 ↗
A single company, on a single island, etches nearly all the chips that train the world's artificial intelligence. The whole chain runs through it. Without the fabs of Hsinchu, Tainan and Kaohsiung, the iPhone, the training GPU and the precision missile cannot be built at the node they need, and no equivalent redundancy exists anywhere else on Earth.
The ≤7 nm nodes (3, 5, 7 nm) account for 77 % of revenue at low volume: 90 % of the technological frontier is not 90 % of the chips. Source: TSMC, Q4 2025 management report (SEC 6-K filing).
What TSMC really is
TSMC designs no chips. Founded on 21 February 1987 by Morris Chang, the company invented the pure-play foundry model: it manufactures for others, Apple (≈22 % of its revenue in 2024), Nvidia, AMD, Qualcomm, without ever competing with its customers. This choice, long deemed modest, has become its main lever: by manufacturing for everyone without competing with them, it has made itself hard to replace. Its share of the foundry market rose from ≈64 % to ≈70 % between 2024 and 2025, ten times that of Samsung.
The famous "90 %" deserves to be read correctly. It comes from a 2021 BCG-SIA study: ≈92 % of the world's most advanced logic capacity (below 10 nm) is in Taiwan. But this concerns ONLY the technological frontier. Across all semiconductors, memory, mature nodes, analog, Taiwan accounts for closer to 40 to 45 % of capacity. Leading-edge nodes generate disproportionate revenue at low volume: dominating 90 % of the frontier is not manufacturing 90 % of the chips. The nuance does not diminish the risk, since it is on this frontier that AI and weaponry are decided.
Why it is a fracture point
The concentration is geographic as much as industrial. Most leading-edge capacity sits on an island of 36,000 km², on an active seismic fault, 130 kilometers from the coast of a power that claims sovereignty over it. Manufacturing an advanced chip takes three to four months and tolerates no interruption: a voltage dip of a few seconds, an earthquake, a shortage of ultra-pure water ruins entire batches.
The fabs consume ≈8.9 % of all of Taiwan's electricity (2023), on an island grid with no international interconnection whatsoever, which suffered two massive blackouts in 2021 and 2022, and which completed its exit from nuclear power in May 2025. In 2021, a historic drought forced the island to suspend irrigation of 74,000 hectares of rice paddies to supply the fabs with ultra-pure water, trucked in. In April 2024, a magnitude 7.4 earthquake cost ≈60 M$, without damaging any critical equipment. Next time may not be so lenient.
The hidden chain behind the fab
TSMC is itself the apex of a pyramid of single-supplier dependencies. Each advanced wafer requires an EUV lithography machine, and ASML, in the Netherlands, holds 100 % of that market; TSMC operates ≈56 % of the global installed base. ASML in turn depends on optics from Carl Zeiss, the sole supplier of the mirrors that reflect light at 13.5 nanometers. EUV resists come more than 90 % from Japan (qualification cycles of one to two years); the neon for the lasers came from Ukraine; the quartz for the crucibles from a single Appalachian valley shut down by Hurricane Helene in 2024.
The tightest bottleneck is now packaging, not etching. Every AI accelerator requires a 2.5D assembly (CoWoS) that marries the GPU to stacks of HBM memory on a single silicon interposer, a capability captive to TSMC (≈95 % of advanced packaging) and SK Hynix (≈90 % of Nvidia's HBM), physically fused. A shock does not need to strike Taiwan to paralyze the chain; it need only strike one of these unique links.
The redundancy that isn't one
Only three players know how to etch leading-edge nodes: TSMC (≈70 % of the market), Samsung Foundry (≈7 %) and Intel Foundry. But knowing how to etch is not being able to do it at scale. Samsung struggles with its 3 nm yields and is losing customers; Intel Foundry booked 17.8 Md$ in revenue in 2025 but only 307 M$ from external customers, against 10.3 Md$ in losses, a national-security bet, not a proven merchant foundry. None matches TSMC's design ecosystem, process maturity and volume.
Geographic diversification, Arizona (165 Md$ committed), Kumamoto in Japan, Dresden in Germany, is real but partial and deliberately a node behind. The Arizona fab has produced N4 since late 2024, but sends its wafers back to Taiwan for advanced packaging, absent there before ≈2028. Moving the front-end without the back-end merely relocates the risk. Building and qualifying a leading-edge fab takes three to five years, then a yield ramp; frontier R&D remains anchored in Hsinchu. Full redundancy, etching, packaging and R&D combined, will not exist before the end of the decade.